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Protecting Quantum Era Cryptography. Today.
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FIQ-PQC02C Post-Quantum ML-DSA IP Core

Compact and Secure Post-Quantum Signature IP Core for Resource-Constrained Devices

As digital signature algorithms face obsolescence in the quantum era, embedded systems require quantum-resistant alternatives that balance performance, area, and power. FortifyIQ’s ML-DSA IP core answers this need with a compact, energy-efficient implementation of the ML-DSA signature scheme, standardized in FIPS 204 based on the CRYSTALS-Dilithium scheme. Designed for secure SoC integration, it supports all security levels of the ML-DSA algorithm and incorporates comprehensive protections against side-channel and fault injection attacks. The IP core is engineered to meet or exceed rigorous certification standards, including FIPS 140-3 and Common Criteria, enabling future-proof authentication for secure embedded applications.

Features

  • Efficient Performance
  • SCA/FIA Protections
  • Patented High-Performance Modular Multiplication
  • Flexible Interfaces
  • RAM/ROM Firmware Support
  • Security Certification Readiness

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External Dependencies

Requires an external cryptographically secure random number generator (CSPRNG)

Applications

  • IoT Devices
  • Automotive Systems
  • Embedded and Industrial Control
  • Authentication Tokens
  • Payment Systems
  • Secure Communications
  • Network Devices

Deliverables

  • SystemVerilog source code or netlist
  • Testbench, input vectors, and expected results
  • Sample timing constraints, synthesis, and simulation scripts
  • Hardware Abstraction Layer (HAL) reference implementation
  • Integration, configuration, and usage manuals
  • Firmware code
  • Software library 
  • Security documentation

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FortifyIQ AVA_VAN.5
Evaluation & Validation Summary
SGS Brightsight Common Criteria Laboratory
“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
“The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own”
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