Secure Cryptography
for the Quantum Era

SCA/FIA-hardened at all algorithm stages.
A unified API from software to silicon.
F/OTA-updatable. Caliptra-compatible. Tunable PPA.

Crypto-agile. Future-ready.

Security Boutique
for High‑Assurance Designs

Precisely tunable quantum-safe cryptographic IP, software libraries, and subsystems with built-in SCA/FIA resistance.

Your strategic security partner. Not just a vendor.

Chip-to-Cloud
Security Compliance

Cryptography for any silicon: ASIC, FPGA, or SoC.
Low power. Tiny footprint. Technology and foundry agnostic.
Highest assurance certifiable.

Security is architected in, not added on.

Secure, High-Performance Solutions
For Chips, AI, and Compliance

FortiPQC™ Post-Quantum Cryptography Implementations

Software and hardware implementations of NIST-standard post-quantum algorithms, resistant to side-channel and fault-injection attacks. A unified API enables seamless integration across HW and SW, and the high-assurance, crypto-agile designs maintain outstanding performance, power, and area efficiency.

EDA Tools for Security Assessment and Verification

Detect and analyze side-channel and fault injection vulnerabilities, pinpointing their sources to the leaking module and even gate. They are continuously updated to include new attacks. For validating the efficiency of in-house developed cryptographic modules both pre- and post-silicon, and to verify the correctness of third-party IP integration — where integration bugs sometimes introduce new vulnerabilities.

Security Cryptographic HW IP Cores

FortiAES™, FortiMac™, FortiPKA™, FortiPQC™ and CryptoBox™  Hardware Security IP Cores

Compact, configurable IPs for ASIC/FPGA delivering classical and post-quantum cryptography with the highest  security assurance. CryptoBox subsystems integrate easily into any design, while patented protections maintain  outstanding performance, power, and area efficiency.

Cryptographic Software Libraries

High-performance and adaptable, these libraries are optimized for deployed systems as well as budget-conscious or resource-constrained devices. They include post-quantum-safe cryptography, are configurable for various use cases, and perform exceptionally well on edge devices, enabling secure operations even on limited hardware.

Leading Security Compliance for Demanding Applications

At FortifyIQ, we deliver powerful, efficient security solutions for extreme use cases where others fall short. Our technology safeguards against side-channel (SCA) and fault-injection (FI) attacks without compromising on performance, power, or space.

Why Choose FortifyIQ?

Maximum security with minimum power, latency, and area.

“FortifyIQ’s solution has the potential of dramatically reducing the cost and delay associated with the manufacturing of DPA-protected devices…

This is an innovative solution to a really important problem, produced by a first-rate team of developers.”

Academic Papers

RAMBAM: A New Very Compact and Efficient Protection of AES against SC and FI attacks

This is an academic paper describing a protection method for AES which is very efficient, and configurable for any application. It introduces...

This is an academic paper describing a protection method for AES which is very efficient, and configurable for any application. It introduces RAMBAM, an innovative algebraic masking technique designed to protect against side-channel attacks and SIFA1.

STORM — Small Table Oriented Redundancy-based SCA Mitigation for AES

STORM effectively solves the long-standing challenge of combining high security against SCA with low gate count and high performance for AES implementations...

STORM effectively solves the long-standing challenge of combining high security against SCA with low gate count and high performance for AES implementations by offering a different tradeoff (memory utilization) that may be preferable to RAMBAM in many practical cases.

Carry-based Differential Power Analysis (CDPA) and its Application to Attacking HMAC-SHA-2

In this paper, FortifyIQ introduces Carry-based Differential Power Analysis (CDPA), a novel methodology that allows for attacking schemes involving arithmetical addition. This...

In this paper, FortifyIQ introduces Carry-based Differential Power Analysis (CDPA), a novel methodology that allows for attacking schemes involving arithmetical addition. This methodology is applied to what is believed to be the first published full-fledged attack on HMAC-SHA-2 which does not require a profiling stage.

First Full-Fledged Side Channel Attack on HMAC-SHA-2

FortifyIQ presents a novel practical template attack on HMAC-SHA-2 intended primarily against its implementations in hardware. Side-channel attacks pose a threat to...

FortifyIQ presents a novel practical template attack on HMAC-SHA-2 intended primarily against its implementations in hardware. Side-channel attacks pose a threat to cryptographic algorithms. HMAC is an important use case of a hash function, in which the input is partially secret and thus unknown to the attacker. Despite a few publications that discuss applications of power analysis techniques to attack HMAC-SHA-2, this is the first generic method that shows a full attack on its hardware implementation.

Modern devices often rely on strong cryptographic keys, yet mathematical strength alone is not enough to ensure security. Attackers increasingly bypass cryptography altogether by exploiting physical leakages through side-channel methods such as Differential Power Analysis (DPA), Differential Electromagnetic Analysis (DEMA), and Fault Injection Analysis (FIA). These attacks are inexpensive to perform, difficult to defend against, and have become a serious threat to contactless smart card systems used in access control, payments, transportation, and digital identity. This paper examines how DEMA attacks compromise smart cards in the real world and introduces a new, cost-effective protection approach that simplifies development while significantly strengthening device security.

Side-channel attacks are a pervasive threat to hardware security, particularly in cryptographic systems where they can leak sensitive information. While some leakage can be mitigated through simple countermeasures, advanced attacks require detailed analysis and design-level protections. FortifyIQ’s Side-Channel Studio provides a comprehensive EDA solution for evaluating and strengthening hardware against side-channel attacks. Engineers can validate designs in pre-silicon simulation, on FPGA boards, and post-silicon, gaining the insight and confidence needed to meet certification requirements and ensure robust protection.

Fault Injection Attacks pose a growing threat to the security of hardware systems, particularly in cryptographic contexts where they can lead to full key recovery. While simple FIAs can often be mitigated through detection mechanisms, cryptographic FIAs — especially ineffective fault attacks — require deeper, design-level countermeasures. FortifyIQ’s Fault Injection Studio addresses this challenge with a comprehensive EDA solution for evaluating and improving algorithmic protections against fault injection attacks.

Explore FortifyIQ’s AES with RAMBAM protection, providing top-tier defense against side-channel and fault injection attacks.

FortifyIQ Announces CAVP‑Validated ML‑DSA Post‑Quantum Digital Signature Verification Library

FIQ-PQC03-SW, ML-DSA compact signature verification is an ultra-compact verification‑only ML‑DSA implementation

September 3, 2026

FortifyIQ Appoints Avishay Shraga as Chief Product Officer

In his new role, Avishay will lead product strategy, roadmap definition, and commercial execution across FortifyIQ’s portfolio, ensuring strong alignment between advanced security technologies, customer needs, and market opportunities.

May 27, 2026

D&R IP SoC Conference

Post-quantum algorithms ML-KEM and ML-DSA, based on Crystals Kyber and Crystals Dilithium, respectively, have been recently standardized by NIST in FIPS 203 and FIPS 204, and are rapidly being adopted worldwide.

December 2, 2025

Carry-based Differential Power Analysis (CDPA)

We present Carry-based Differential Power Analysis (CDPA) — a new side-channel attack targeting algorithms that use arithmetic addition. Applied to HMAC-SHA-2, CDPA enables full key recovery from power traces, both in simulation and on FPGA hardware. With as few as 30K traces, secret keys can be recovered in some cases, allowing for forging the HMAC-SHA-2 signature of any message, and with 275K traces, the success rate reaches 100%. This demonstrates that even pure hardware implementations of HMAC-SHA-2 are vulnerable unless properly protected. To our knowledge, this is the first successful non-profiling attack on hardware HMAC-SHA-2.

November 24, 2025

Secure, High-Performance Solutions For Chips, AI, and Compliance

FortiPQC™ Post-Quantum Cryptography Implementations

EDA Tools for Security Assessment and Verification

FortiAES™, FortiMac™, FortiPKA™, FortiPQC™ and CryptoBox™ Hardware Security IP Cores

Cryptographic Software Libraries

A Decade of Expertise

Post-Quantum Readiness

Theory + Practice Fusion

Mathematical Precision

Invincible Resilience