This section features FortifyIQ's academic publications, presenting AES protection techniques against side-channel and fault injection attacks and side-channel attacks on SHA-2-based HMAC.
Learn MoreHigh-assurance cryptographic implementations of AES, HMAC, PKA, PQC, CryptoBox, and Root-of-Trust families, plus software libraries, all exceptionally efficient (PPA-optimized).
See MoreProvide high-assurance cryptographic protection, engineered for AVA_VAN.5 compliance and designed for high-security certification.
Secures both new and already-deployed devices, including those without hardware countermeasures, and is proven in millions of systems.
Provides ultra-strong protection against SCA, FIA, and cache attacks.
What are side-channel and fault-injection attacks, and why would your device need protection against them? Etc.
Provides a comprehensive suite of post-quantum cryptography hardware, including CryptoBoxes, IP cores, and Root-of-Trust modules.
Provide high-assurance cryptographic protection, engineered for AVA_VAN.5 compliance and designed for high-security certification.
CryptoBoxes and Roots of Trust (RoTs) integrate post-quantum and classical cryptography in a unified, high-assurance architecture.
Why post-quantum cryptography matters? Etc.
The most popular myths and facts about post-quantum cryptography.
Enables engineers to evaluate and strengthen hardware designs against fault injection attacks, e.g., DFA, SIFA, and AFA.
Pre-silicon EDA tool suite designed to identify, analyze, and mitigate side-channel vulnerabilities in hardware designs from RTL.
Mathematically sound and practically validated patented/patent-pending countermeasures, ensuring resistance to the most advanced physical attacks.
Mathematically sound and practically validated patented/patent-pending countermeasures, ensuring resistance to the most advanced physical attacks.
How does FortifyIQ validate resistance to side-channel and fault-injection attacks? Etc.
Resilient cryptographic protection for payment systems, digital banking, and secure financial infrastructure.
Secure cryptographic foundations for identity systems, defense infrastructure, and digital government platforms.
From payment cards to e-passports, SIMs, and digital ID tokens, smart cards and digital identity solutions power critical transactions.
Securing network infrastructure, subscriber identity, and cloud-native telecommunication systems.
Automotive Cybersecurity IPs and Tools for ECUs, ADAS, AV and In-Vehicle-Infotainment (IVI) Systems.
Robust, certifiable security solutions for next-generation industrial automation and control systems.
Cryptographic security tailored to the needs of energy systems: robust protection against side-channel and fault injection attacks.
Safeguarding energy, water, and transportation systems with certifiable hardware and software security.
Cryptographic protection engineered for the longevity, safety, and regulatory demands of rail and transportation systems.
Ultra-high-throughput, physically secure cryptographic IP for cloud and data center silicon.
Cryptographic protection for IoT systems, with unmatched resistance to side-channel analysis and fault injection attacks.
Secure cryptography and OTA updates for ultra-constrained, mission-critical medical electronics.
Robust, efficient cryptographic protections for media platforms that resist real-world physical attacks with minimal performance tradeoffs.
Cryptographic solutions purpose-built for silicon IP protection, licensing enforcement, and clone detection.
In healthcare, we provide comprehensive cryptographic solutions — from traditional to post-quantum cryptography.
This section features FortifyIQ's academic publications, presenting AES protection techniques against side-channel and fault injection attacks and side-channel attacks on SHA-2-based HMAC.
Learn MoreThis section demonstrates how FortifyIQ validates cryptographic solutions, compares ours against other secure cores, and showcases FortiEDA for evaluating and developing secure designs.
Learn MoreOur explanatory videos break down complex hardware security concepts into clear, visual stories, showcasing how FortifyIQ's technologies detect and prevent side-channel and fault-injection attacks.
Learn MoreThis section features FortifyIQ's academic publications, presenting AES protection techniques against side-channel and fault injection attacks and side-channel attacks on SHA-2-based HMAC.
Learn MoreThis section demonstrates how FortifyIQ validates cryptographic solutions, compares ours against other secure cores, and showcases FortiEDA for evaluating and developing secure designs.
Learn MoreOur explanatory videos break down complex hardware security concepts into clear, visual stories, showcasing how FortifyIQ's technologies detect and prevent side-channel and fault-injection attacks.
Learn MoreOur explanatory videos break down complex hardware security concepts into clear, visual stories, showcasing how FortifyIQ's technologies detect and prevent side-channel and fault-injection attacks.
Learn MoreCompact and Secure Post-Quantum Key Encapsulation SW Library for Resource-Constrained Devices
As classical asymmetric encryption and secure key establishment algorithms face obsolescence in the quantum era, embedded systems require quantum-resistant alternatives that balance performance, code size, RAM size, and power consumption. FortifyIQ’s ML-KEM SW library answers this need with a compact and efficient implementation of the ML-KEM key encapsulation scheme, enabling secure shared key establishment, standardized in FIPS 203 based on the CRYSTALS-Kyber scheme. Designed for secure SoC integration, it supports all security levels of the ML-KEM algorithm and incorporates comprehensive protections against side-channel injection attacks. The IP core is engineered to meet or exceed rigorous certification standards, including FIPS 140-3 and Common Criteria, enabling future-proof authentication for secure embedded applications.
FortifyIQ’s ML-KEM SW library implements the ML-KEM key encapsulation algorithm, standardized in FIPS 203.
The implementation is algorithmically protected against SCA and FIA with a low overhead in performance and code size compared to a typical SW implementation without protections against SCA and FIA, and with significantly better performance than implementations with share-based protections. The protection is based on performing the sensitive parts of the calculations in a redundant domain.
The core supports all three ML-KEM security levels (ML-KEM-512, ML-KEM-768, and ML-KEM-1024), offering configurable performance and security trade-offs. For efficiency, the low-level protected functions used in the innermost loops are implemented in Assembly.