Protecting Quantum Era Cryptography. Today.

FIQ-PQC01C Post-Quantum ML-KEM IP Core

Compact and Secure Post-Quantum ML-KEM IP Core for Resource-Constrained Devices

As quantum computing threatens traditional public-key cryptography, resource-constrained devices must adopt quantum-resistant algorithms without compromising efficiency or security. FortifyIQ’s ML-KEM IP addresses this challenge with a compact, energy-efficient hardware core implementing the Kyber-based Key Encapsulation Mechanism standardized in FIPS 203. Designed for secure SoC integration, it supports all ML-KEM parameter sets and includes robust protections against side-channel and fault injection attacks. The IP is engineered to meet stringent certification requirements, including FIPS 140-3 and Common Criteria, enabling secure, future-proof key exchange for embedded systems.

Features

  • Efficient Performance
  • SCA/FIA Protections
  • Patented High-Performance Modulo Multiplication
  • Flexible Interfaces
  • RAM/ROM Firmware Support
  • Security Certification Readiness

Applications

  • IoT Devices
  • Automotive Systems
  • Embedded and Industrial Control
  • Authentication Tokens
  • Payment Systems
  • Secure Communications
  • Network Devices
Technical Overview

FortifyIQ’s ML-KEM Accelerator IP is a compact, high-performance hardware core implementing the Kyber Key Encapsulation Mechanism (ML-KEM) as standardized in FIPS 203. Optimized for secure SoC integration, this IP enables post-quantum key establishment with low power and area overhead, suitable for embedded and resource constrained systems preparing for quantum-resilient cryptography.

The core supports all three parameter sets defined by the NIST PQC standardization process (ML-KEM-512, ML-KEM-768, and ML-KEM-1024), offering configurable security levels. Built around a high-throughput Number-Theoretic Transform (NTT) engine, the architecture is tailored for efficient polynomial operations, enabling fast key generation, encapsulation, and decapsulation.

Because ML-KEM involves secret-key operations, FortifyIQ’s accelerator includes built-in countermeasures against physical attacks, such as masking, constant-time logic, input/output scrambling, and integrity checks, making it suitable for deployment in high-assurance applications targeting compliance with FIPS 140-3 and Common Criteria.

Engineered to be implementation-agnostic and integration-friendly, FortifyIQ’s ML-KEM IP enables forward-looking SoC designs to meet the emerging demands of post-quantum cryptography without compromising efficiency or security.

External Dependencies

  • Requires an external cryptographically secure random number generator (CSPRNG)

Deliverables

  • SystemVerilog source code or netlist
  • Testbench, input vectors, and expected results
  • Sample timing constraints, synthesis, and simulation scripts
  • Hardware Abstraction Layer (HAL) reference implementation
  • Integration, configuration, and usage manuals
  • Firmware code
  • Software library
  • Security documentation
FortifyIQ AES Algorithm
AVA_VAN.5 Evaluation & Validation Summary
SGS Brightsight Common Criteria Laboratory
Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
“The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own
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