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Protecting Quantum Era Cryptography. Today.
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FIQ-PKA01C ECC Secure Accelerator

Compact and Secure ECC IP Core for Resource-Constrained Devices

Resource-constrained devices often lack the area and power budget for secure elliptic curve operations, yet face serious risk from physical attacks like side-channel analysis and fault injections. FortifyIQ’s FIQ-PKA01C addresses this challenge with a compact, energy-efficient ECC IP core designed for secure SoC integration. Supporting algorithms such as ECDH, ECDSA, EdDSA, and including multi-layered SCA/FIA protections, it offers robust, security-certifiable cryptography with minimal performance degradation. The IP is engineered to meet or exceed rigorous security certification standards across all levels of FIPS 140-3 and Common Criteria.

Features

  • Efficient Performance
  • SCA/FIA Protections
  • Patented High-Performance Modulo Multiplication
  • Flexible Interfaces
  • RAM/ROM Firmware Support
  • Security Certification Readiness

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External Dependencies

  • Requires an external cryptographically secure random number generator (CSPRNG)
  • Requires an external hash function to enable ECDSA operations

Applications

  • IoT Devices
  • Automotive Systems
  • Embedded and Industrial Control
  • Authentication Tokens
  • Payment Systems

Deliverables

  • SystemVerilog source code or netlist
  • Testbench, input vectors, and expected results
  • Sample timing constraints, synthesis, and simulation scripts
  • Hardware Abstraction Layer (HAL) reference implementation
  • Integration, configuration, and usage manuals
  • Firmware code
  • Software library 
  • Security documentation

Related Products

FIQ-PKA02B

More performance-oriented version of FIQ-PKA01C

FIQ-PKA04C

Compact RSA signature verification core

FIQ-BOX01C

Compact accelerator for asymmetric cryptography and AES

FIQ-PQC03B

Accelerator for Classical and Post-Quantum asymmetric cryptography

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FortifyIQ AVA_VAN.5
Evaluation & Validation Summary
SGS Brightsight Common Criteria Laboratory
“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
“The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own”
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