Protecting Quantum Era Cryptography. Today.
Balanced AES Core with Multi-Mode Support and Advanced SCA/FI Protection
FortifyIQ’s Balanced AES IP core is a compact yet capable cryptographic accelerator designed for embedded systems with moderate performance and resource requirements. Supporting AES-128/256 encryption and decryption in all standard modes, including ECB, CBC, and CTR (excluding GCM and XTS), the core delivers flexible and efficient data protection. Built on a four-S-box architecture for improved throughput, it features robust side-channel and fault-injection countermeasures, based on the innovative RAMBAM protection scheme. Applied at the RTL level and validated by a Common Criteria accredited lab, the core is silicon-proven and ready for use in applications targeting FIPS 140-3 and Common Criteria certification. Ideal for secure boot, encrypted storage, and communication protocols in balanced embedded devices.
FortifyIQ’s Balanced AES IP core is a silicon-proven, high-efficiency hardware implementation of the AES algorithm, tailored for embedded systems with balanced area, performance, and power constraints. It supports AES-128 and AES-256, offering both encryption and decryption capabilities across a wide range of standard block cipher modes, including ECB, CBC, and CTR (excluding GCM and XTS). This makes it well-suited for secure boot, firmware encryption, secure communication, and data-at-rest protection.
The core is based on a four-S-box architecture, allowing improved parallelism and reduced latency over single-S-box designs while still maintaining a compact silicon footprint. This design choice enables higher throughput without a significant increase in power or area, making it ideal for applications like secure MCUs, IoT gateways, automotive controllers, and connected medical devices.
The core provides robust protection against physical attacks, incorporating FortifyIQ’s innovative RAMBAM protection scheme, a highly efficient algorithmic countermeasure framework designed to mitigate both side-channel analysis (SCA) and fault injection (FI) attacks. RAMBAM operates entirely at the RTL level, is implementation-agnostic, and introduces no dependency on physical design constraints, ensuring consistent security across ASIC and FPGA targets. A Common Criteria accredited laboratory has independently validated RAMBAM at the highest security assurance level.
Designed for FIPS 140-3 and Common Criteria certification targets, the core delivers not only cryptographic standards compliance, but also a hardened foundation suitable for high-assurance applications. FortifyIQ’s Balanced AES IP core offers a well-optimized blend of performance, security, and compactness.
