⌂ 〉 Cryptographic Hardware IP Cores 〉 HMAC SHA2
FortiMAC provides secure HMAC-SHA2 implementations in both hardware and software, designed to meet the highest assurance levels with minimal performance and area impact.
It includes two hardware variants: a Zero-Leakage TI version and a fast, compact version validated beyond 100M traces against the known attacks on HMAC-SHA2.
Mathematical and provably secure foundations for the TI variant.
Unified HW–SW API enabling seamless migration.
Compact, Fast, Low-Power HW option validated at extreme levels — beyond 100M traces against the known HMAC attacks.
Zero-Leakage HW option: Threshold Implementation (TI) design with strict non-completeness properties and validated at zero-leakage against over 100M traces.
Technology-agnostic soft-macro for easy portability. It is implementation and foundry agnostic, as well.
SW library validated similarly, offering a practical option for existing devices. It is a software implementation of the security-proven Threshold Implementation.
Low area and high throughput with the highest security guarantees.
FortiMAC is designed to integrate exactly like conventional HMAC or SHA units, with pre-tuned soft macro tailored to the required performance and memory profile and no customer programming needed.
Both hardware and software use the same unified API for seamless migration.
Designed to support SESIP 5, FIPS 140-3/4, CC EAL6+, and AVA_VAN.5 evaluations.
FortiMAC offers measurable, evaluation-ready security with minimal overhead, backed by rigorous testing and mathematical guarantees.