Protecting Quantum Era Cryptography. Today.
FortiAES provides FortifyIQ’s high-assurance AES implementations in both hardware and software. These designs deliver intrinsic resistance to side-channel and fault-injection attacks, extremely small area, low latency, and performance that meets or exceeds traditional unprotected AES, while retaining high-assurance security across all operating conditions.
All FortiAES products utilize protection methods based on finite field arithmetic that implement attack resistance without extra latency costs. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round.
All FortiAES products utilize protection methods based on finite field arithmetic that implement attack resistance without extra latency costs. Purely mathematically-driven, these cores achieve a high maximum frequency, and one clock cycle per AES round.
Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was validated by a third-party Common Criteria lab, SGS Brightsight at AVA_VAN.5 level, Common Criteria’s highest security level. Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. This means they are technology-agnostic, implementation-agnostic, and even foundry-agnostic, ensuring compatibility and security across diverse platforms and devices.
AES is embedded in nearly every secure system. Traditionally, implementers add multiple layers of countermeasures to mitigate leakage and fault vulnerabilities, leading to high area, lower performance, and integration complexity. As attackers increasingly use low-cost equipment to break naïve AES implementations, the need for robust, verifiable, evaluation-ready AES has become unavoidable.
Security Boutique:
Each FortiAES implementation is tailored to the device’s exact needs, balancing throughput, latency, area, RAM/ROM usage, and protection level. Optional radiation-induced fault hardening (SEU / SET / SEL) for space, aerospace, and safety-critical environments.
Intrinsic high-assurance security:
AES-IP cores evaluated and validated (by SGS Brightsight) to AVA_VAN.5-compliant design principles and validated internally against 1 billion power traces with FortiEDA pre/post-silicon security evaluation tools for robustness to side-channel and fault injection attacks.
Minimal PPA overhead:
Security is embedded in the algorithmic structure, avoiding heavy countermeasures.
High performance:
AES SW reaches ~900 Mbps on a 3.4 GHz processor; AES HW scales into the 100-Gbps range depending on configuration.
Mathematically grounded implementations:
The ultra-low power, ultra-compact algorithm, STORM, features a formal mathematical security proof. The high-performance algorithm, RAMBAM, features a variable which controls the protection strength, configurable up to zero leakage according to the needs of the customer.
Drop-in compatible:
Integrates exactly like a conventional AES core, with no added constraints or custom handling.
Soft-macro and implementation-agnostic:
Easily ports to any foundry, node, or design methodology.
Consistent HW–SW interface:
Software AES uses the same API as hardware, enabling direct comparison and seamless transition. Software AES can be deployed via OTA updates on existing devices, and migrated to HW when silicon is ready.
FortiAES integrates like a conventional AES engine with no special operational constraints. Both the hardware and software options can be configured to your device’s PPA and memory constraints, with the unified API interface for seamless migration.
FortiAES supports the highest level certification paths: for FIPS 140-3/4, SESIP up to level 5, and Common Criteria EAL6+ (AVA_VAN.5).
FortiAES eliminates the traditional tradeoff between high security and high performance. Its mathematical foundations and comprehensive testing make it suitable for both constrained devices and high-security systems. The Security Boutique ensures each device receives a solution customized for its exact needs.
