High-Performance, Ultra Low-Power AES Encryption Core with Full Mode Support and Formally Proven SCA Protection
FortifyIQ’s High-Throughput, low-power consumption AES IP core delivers AES-128/256 encryption-only with full support for ECB, CBC, CTR, GCM, and XTS modes, optimized for maximum speed in secure, data-intensive systems. Its parallel multi-S-box architecture enables high throughput and low latency, ideal for storage encryption, secure networking, and real-time applications. The core integrates STORM, a lookup table-based side-channel protection scheme derived from FortifyIQ’s RAMBAM architecture. STORM includes a formally proven guarantee of resistance against side-channel attacks (SCA) and is implemented entirely at the RTL level, ensuring layout-agnostic, technology-independent protection. Designed for systems targeting FIPS 140-3 and Common Criteria, this AES core offers a robust blend of performance, power-efficiency, flexibility, and certified-ready physical security for high-end embedded platforms.
High-Throughput AES Core with Advanced SCA/FI Protection for Performance-Critical Systems
High-Performance AES Encryption Core with GCM/XTS Support and Advanced SCA/FI Protection
AES Encryption Core with Extreme SCA Protection for Ultra-High-Security Applications
Ultra-High-Performance AES-GCM Core with RAMBAM-Based SCA/FI Protection
“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
” The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own.”
