Protecting Quantum Era Cryptography. Today.

FAQ: Our Post Quantum Cryptography (PQC)

FortifyIQ delivers cryptographic IP and software libraries, and roots of trust that are validated, documented, and can be configured to help your products meet even the highest standards of security and regulatory compliance. Using our advanced EDA tools and closely guided integration support, we ensure that the protections validated in our labs are preserved in your actual devices. This approach gives you a trusted foundation for NIST FIPS 140-3 level 4, Common Criteria up to EAL6+, and industry-specific certifications, while reducing the complexity, time, and cost of achieving compliance. Together, these validations give customers the confidence that FortifyIQ technology provides enduring security for today and tomorrow, including the post-quantum era.

What are ML-KEM and ML-DSA?

ML-KEM and ML-DSA are post-quantum asymmetric cryptography primitives. ML-KEM (Key Encapsulation Mechanism) establishes shared secret keys, and ML-DSA (Digital Signature Algorithm) provides digital signatures. Together, they cover all asymmetric crypto needs.

AES-256 encrypts data, and HMAC-SHA-512 ensures integrity and authenticity. Both are inherently PQC-ready and SCA/FIA resistant, completing a high-assurance, quantum-safe cryptographic stack.

Hybrid cryptography supports both classical asymmetric algorithms (RSA/ECC) and post-quantum cryptography (ML-KEM/ML-DSA). Since asymmetric crypto is used between two devices, one side may be PQC-enabled while the other is still legacy. Hybrid solutions ensure secure communication across this transition. FortifyIQ provides hybrid IP cores and libraries combining classical + PQC + AES + HMAC, or any subset, all high-assurance, SCA/FIA resistant.

FortifyIQ libraries and cores use a unified API for seamless HW/SW integration. Hardware soft macros are foundry-agnostic, synthesizable across standard CMOS nodes, and platform-independent. Software libraries are OTA-deployable, and asymmetric crypto (classical + PQC) is FOTA-updatable, allowing updates for emerging threats.

Using a patent-pending algorithmic protection method (from the same family as our AVA_VAN.5 AES), our PQC libraries were validated with >100,000 power traces, covering all stages including compression/decompression, which standard masking cannot protect. Our libraries are all SCA and FIA resistant, providing government-grade security.

Our in-house validation was achieved both in simulation and on a physical device with our advanced pre-silicon security evaluation tools (FortiEDA), and by third-party certification (in process).

FortifyIQ libraries are optimized for minimal RAM and high-performance execution. Our algorithmic protection adds almost no size or speed penalty. Deployments scale from smart cards to edge AI and cloud systems. More details under NDA.

FortifyIQ offers tunability to each device or user’s needs, including custom PPA, memory, and security levels. Products can be optimized for each device’s specific constraints and performance requirements.

Yes, it’s quantum ready and compatible. Our hardware cryptographic algorithms are all designed to operate together as a single, coherent quantum-safe system, with seamless interoperability between classical, post-quantum, and symmetric cryptography. They are all side-channel and fault injection resistant, high-assurance security level compliant, and are all Caliptra-compatible, providing PQC readiness, outstanding PPA, certifiability, and complete configurability to Caliptra.

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FortifyIQ AES Algorithm
AVA_VAN.5 Evaluation & Validation Summary
SGS Brightsight Common Criteria Laboratory
Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”
“The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own
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