FortiPQC Software Libraries

FortifyIQ’s PQC software libraries provide high-assurance cryptographic protection, engineered for AVA_VAN.5 compliance and designed for high-security certification.

 

They implement ML-KEM (Kyber) and ML-DSA (Dilithium) with algorithmic hardening against side-channel and fault-injection attacks, while maintaining power, performance, and latency comparable to naive PQC implementations, with only a minor code-size overhead.

 

Built for legacy, resource-constrained, and modern systems, the libraries are OTA-updatable and NIST PQC–compliant, enabling secure deployment across embedded, industrial, and cloud applications.

Architecture & Features

  • Processor-agnostic, running on legacy ARM cores up to high-performance CPUs
  • Tunable/configurable to device constraints and industry needs
  • Over-the-air (OTA) deployable for retrofitting PQC into fielded devices
  • Matches naive PQC software implementations in performance and power consumption
  • Supports FIPS 140-3 up to Level 4, SESIP up to Level 5, and Common Criteria AVA_VAN.5 certification targets
  • Resistant to side-channel and fault injection attacks
  • Uses the unified API for:
Seamless integration with hardware IP
Simplified deployment and management across device fleets
OTA upgrades of PQC algorithms on devices with or without dedicated hardware
Future-proof cryptography adaptable to new standards or algorithms

Use Cases:

Cloud, Server, and Data Center Applications

Deploy post-quantum key exchange and signatures without hardware acceleration.

Edge and Embedded Systems

Upgradeable PQC via OTA, maintaining performance under constrained resources.

Legacy and Long-Lifecycle Devices

Add certifiable PQC protection without hardware redesign.

Roots of Trust and Secure Boot Chains

Integrate software PQC for authentication, attestation, and firmware integrity validation.

Hybrid Security Architectures

Combine FortiPQC-SW with hardware IPs under a unified API for seamless migration or redundancy.

Regulated and Certifiable Environments

Aligned with FIPS 140-3, Common Criteria AVA_VAN.5, and SESIP certification goals.

Features excellent PPA efficiency with robust protection against side-channel and fault-injection attacks.



Tunable to each deployment’s needs.
Ideal for future-proof security in embedded systems, chips, and chiplets.

Fortify’s AES security evaluation by SGS

“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”

” The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own.”

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