⌂ 〉 Cryptographic Hardware IP Cores 〉 ECC/RSA
Unified SW–HW interface enabling immediate deployment on legacy devices, and simple migration to hardware implementation.
Boutique tailoring for latency, area, or power targets, radiation hardening, and certification targets. Customization is flexible until tape-out.
Software libraries with minimal RAM use for legacy or cost-sensitive systems.
High-performance hardware intrinsically hardened and validated against side-channel and fault injection attacks.
Soft-macro, process-agnostic design.
Full internal lab validation via FortiEDA in simulation, on an FPGA board and in silicon
FortiPKA hardware soft macro IPs provide asymmetric cryptography RSA/ECC, SCA/FIA-resistant security with exceptional Power-Performance-Area (PPA) and full design portability. They integrate seamlessly into any semiconductor platform, from cost-constrained embedded devices to advanced data-center and multi-chip systems.
Identical API across software and hardware allows early migration without rewriting application logic.
Supports CC EAL6+, SESIP 5, FIPS 140-3/4, and AVA_VAN.5 requirements.
FortiPKA provides hardened arithmetic and high-assurance security without the typical performance degradation found in protected RSA/ECC implementations.