Presented at CHES 2022 conference

RAMBAM:

A New Very Compact and Efficient Protection of AES against SC and FI attacks

This is an academic paper describing a protection method for AES which is very efficient, and configurable for any application. It introduces RAMBAM, an innovative algebraic masking technique designed to protect against side-channel attacks and SIFA1.

Utilizing redundant representations in the Galois field and re-randomization, RAMBAM maintains uniform distribution of the masked state. Its flexibility, driven by the security parameter (d), allows for various configurations. Experimental results show that leakage decreases exponentially with increased redundancy, achieving no observable leakage with (d = 8) in extensive tests. RAMBAM offers lower latency compared to previous solutions, and ensures robustness against SIFA-1 attacks targeting up to 4 bits in the internal state register.

FortifyIQ presents an analytical model that explains how the scheme reduces the leakage and how the design choices affect it. Furthermore, FortifyIQ demonstrates experimentally how different design choices achieve the required goals. In particular, the compact version exhibits a gate count as low as 12.075 kGE, while maintaining adequate protection. The performance-oriented version provides latency as low as one round per cycle, thus combining protection against SCA and SIFA-1 with high performance.

Fortify’s AES security evaluation by SGS

“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”

” The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own.”

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