FIQ-PQC05F High-Performance Hybrid Classical and Post-Quantum Cryptography

Hybrid Classical and Post-Quantum Cryptography IP Core for Future-Proof Security

FortifyIQ’s High-Performance Hybrid Cryptography IP core delivers accelerated support for both classical (RSA, ECC) and post-quantum (ML-KEM, ML-DSA) algorithms in a unified architecture optimized for maximum throughput. Designed for security-critical systems requiring long-term protection and cryptographic agility, the IP enables hybrid key exchange and digital signature schemes aligned with NIST recommendations. Featuring parallelized arithmetic units, pipelined execution, and shared hash acceleration, it offers exceptional performance without compromising security. With built-in SCA/FIA protections and support for FIPS 140-3 and Common Criteria certification, this core is ideal for next-generation secure boot, firmware authentication, and high-speed communication protocols.

Features

  • Efficient Performance
  • SCA/FIA Protections
  • Patented High-Performance Modulo Multiplication
  • Flexible Interfaces
  • RAM/ROM Firmware Support
  • Security Certification Readiness

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External Dependencies

Requires an external cryptographically secure random number generator (CSPRNG)

Applications

  • Automotive Systems
  • Embedded and Industrial Control
  • Payment Systems
  • Secure Communications
  • Network Devices

Deliverables

  • SystemVerilog source code or netlist
  • Testbench, input vectors, and expected results
  • Sample timing constraints, synthesis, and simulation scripts
  • Hardware Abstraction Layer (HAL) reference implementation
  • Integration, configuration, and usage manuals
  • Firmware code
  • Software library 
  • Security documentation

Related Products

FIQ-BOX04F

Cryptographic tools set including PQC support 

FIQ-PQC03B

Versatile PQC balanced accelerator

FIQ-PQC04B

Balanced accelerator for Classical and Post-Quantum asymmetric cryptography

Fortify’s AES security evaluation by SGS

“Summary. The leakage analysis (Welch t-test) on over 30 million traces did not show statistically significant first- and second-order differences between trace sets with fixed and random inputs. The template-based DPA analysis, on the pseudo-random trace set for the profiling phase (15 million traces) and on a sub-set of 300k fix input traces for matching phase targeting the first-round S-box output, and template attack on ciphertext, did not indicate any potential information leakage.”

” The results for the soft IP presented in the report were obtained on the TOE which is the basic hardware implementation of the soft IP without additional levels of security (e.g. that are present in a secure silicon layout). Therefore the internal strength of the soft IP itself was evaluated. This indicates that the investigated features and parameters of the soft IP implementation should be robust against SCA and fault injection attacks in different implementations including ASIC. Nevertheless, according to the Common Criteria rules, the strength of the final composite product must be evaluated on its own.”

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