Configurable AES IPs for every application, from ULP to pipelined high-throughput. SCA/FIA-resistant.
FortiCrypt products utilize protection methods based on finite field arithmetic that implement attack resistance without incurring extra latency costs.
Our core protection algorithm was tested rigorously, passing the Test Vector Leakage Assessment (TVLA) test at 1 billion traces, and was validated by a third-party Common Criteria lab.
Our cores are fully synthesizable, eliminating the need for custom cells or special place & route handling. They are technology-agnostic, ensuring compatibility and security across diverse platforms and devices.
FortiCrypt AES cores deliver high-assurance encryption/decryption with exceptional PPA efficiency, tunable to each deployment case. Their proven protection against side-channel and fault-injection attacks is validated in simulation, FPGA, and in silicon. All cores are designed to support high-assurance certification under standards such as FIPS 140-3 and Common Criteria.